by David Shah
At: FOSDEM 2019
Following on from Project Icestorm; Project Trellis has created bitstream documentation for the substantially larger Lattice ECP5 FPGAs. This has been combined with a new multi-architecture FOSS place-and-route tool, nextpnr, and the existing Yosys Verilog synthesis tool to build a fully-FOSS FPGA flow for these parts; capable of building advanced designs including SoCs running Linux! This talk will include an overview of the flow for developers and end users alike; as well as how you can contribute to the FOSS FPGA ecosystem.
Scheduled start: 2019-02-03 10:30:00+01