Skip to main content

[Coursera] Computer Architecture

Movies Preview

movies

[Coursera] Computer Architecture

by
David Wentzlaff (Princeton University)

Publisher
Academic Torrents
Contributor
Academic Torrents
About this course: In this course, you will learn to design the computer architecture of complex modern microprocessors.

### Introduction, Instruction Set Architecture, and Microcode
This lecture will give you a broad overview of the course, as well as the description of architecture, micro-architecture and instruction set architectures.


### Pipelining Review
This lecture covers the basic concept of pipeline and two different types of hazards.


### Cache Review
This lecture covers control hazards and the motivation for caches.


### Superscalar 1
This lecture covers cache characteristics and basic superscalar architecture.


### Superscalar 2 & Exceptions
This lecture covers the common issues for superscalar architecture.


### Superscalar 3
This lecture covers different kinds of architectures for out-of-order processors.


### Superscalar 4
This lecture covers the common methods used to improve the performance of out-of-order processors including register renaming and memory disambiguation.


### VLIW 1
This lecture covers the basic concept of very long instruction word (VLIW) processors.


### VLIW2
This lecture covers the common methods used to improve VLIW performance.


### Branch Prediction
This lecture covers the motivation and implementation of branch predictors.


### Advanced Caches 1
This lecture covers the advanced mechanisms used to improve cache performance.


### Advanced Caches 2
This lecture covers more advanced mechanisms used to improve cache performance.


### Memory Protection
This lecture covers memory management and protection.


### Vector Processors and GPUs
This lecture covers the vector processor and optimizations for vector processors.


### Multithreading
This lecture covers different types of multithreading.


### Parallel Programming 1
This lecture covers the concepts of parallelism, consistency models, and basic parallel programming techniques.


### Parallel Programming 2
This lecture covers the solutions for the consistency problem in parallel programming.


### Small Multiprocessors
This lecture covers the implementation of small multiprocessors.


### Multiprocessor Interconnect 1
This lecture covers the design of interconnects for a multiprocessor.


### Multiprocessor Interconnect 2
This lecture covers the design of interconnects for multiprocessor and network topology.

### Large Multiprocessors (Directory Protocols)
This lecture covers the motivation and implementation of directory protocol used for coherence on large multiproccesors.
Academictorrents_collection
video-lectures
Addeddate
2018-08-12 18:54:14
External-identifier
urn:academictorrents:53bae6d22f3b6e692673f9335e0a0198c1618426
Identifier
academictorrents_53bae6d22f3b6e692673f9335e0a0198c1618426
Ocr
ABBYY FineReader 11.0 (Extended OCR)
Ppi
300
Scanner
Internet Archive Python library 1.8.1
Source
http://academictorrents.com/details/53bae6d22f3b6e692673f9335e0a0198c1618426
torrent:urn:sha1:53bae6d22f3b6e692673f9335e0a0198c1618426

plus-circle Add Review
comment
Reviews

There are no reviews yet. Be the first one to write a review.

3,963 Views

5 Favorites

DOWNLOAD OPTIONS

download 13 files
ABBYY GZ
Uplevel BACK
download 13 files
FULL TEXT
Uplevel BACK
download 1 file
ITEM TILE download
download 108 files
MPEG4
Uplevel BACK
99.4M
Computer Architecture 0.0 L00-S1Course Introduction.mp4 download
18.2M
Computer Architecture 1.0 L1S1 Course Overview (434).mp4 download
95.0M
Computer Architecture 1.1 L1S2 Motivation (1640).mp4 download
25.8M
Computer Architecture 1.2 L1S3 Course Content (910).mp4 download
52.8M
Computer Architecture 1.3 L1S4 Architecture and Microarchitecture (2337).mp4 download
32.8M
Computer Architecture 1.4 L1S5 Machine Models (1602).mp4 download
58.0M
Computer Architecture 1.5 L1S6 ISA Characteristics (2547).mp4 download
1.9M
Computer Architecture 1.6 L1S7 Recap (0117).mp4 download
81.9M
Computer Architecture 2.0 L2S1 Microcoded Microarchitecture (1408).mp4 download
64.7M
Computer Architecture 2.1 L2S2 Pipeline Basics (3051).mp4 download
23.2M
Computer Architecture 2.2 L2S3 Structural Hazard (1013).mp4 download
92.9M
Computer Architecture 2.3 L2S4 Data Hazards (4633).mp4 download
26.9M
Computer Architecture 3.0 L3S1 Control Hazards Jumps (1556).mp4 download
47.5M
Computer Architecture 3.1 L3S2 Control Hazards Branch (2402).mp4 download
15.6M
Computer Architecture 3.2 L3S3 Control Hazards Others(751).mp4 download
50.5M
Computer Architecture 3.3 L3S4 Memory Technologies (2247).mp4 download
127.4M
Computer Architecture 3.4 L3S5 Motivation for Caches (2225).mp4 download
159.7M
Computer Architecture 4.0 L4S1 Classifying Caches (2807).mp4 download
31.3M
Computer Architecture 4.1 L4S2 Cache Performance (1711).mp4 download
13.5M
Computer Architecture 4.2 L4S3 Superscalar 1 (642).mp4 download
9.5M
Computer Architecture 4.3 L4S4 Basic Two-way In-order Superscalar (456).mp4 download
19.1M
Computer Architecture 4.4 L4S5 Fetch Logic and Alignment (1101).mp4 download
8.5M
Computer Architecture 5.0 L5S1 Baseline Superscalar and Alignment (416).mp4 download
23.7M
Computer Architecture 5.1 L5S2 Interrupts and Bypassing (1213).mp4 download
57.2M
Computer Architecture 5.2 L5S3 Interrupts and Exceptions (2925).mp4 download
61.9M
Computer Architecture 5.3 L5S4 Introduction to Out-of-Order Processors (3053).mp4 download
6.9M
Computer Architecture 6.0 L6S1 Review of Out-of-Order Processors (326).mp4 download
38.8M
Computer Architecture 6.1 L6S2 I2O2 Processors (1958).mp4 download
161.9M
Computer Architecture 6.2 L6S3 I2O1 Processors (2844).mp4 download
32.0M
Computer Architecture 6.3 L6S4 IO3 Processors (1623).mp4 download
8.1M
Computer Architecture 6.4 L6S5 IO2I Processors (431).mp4 download
29.1M
Computer Architecture 7.0 L7S1 Speculation and Branch (1437).mp4 download
63.3M
Computer Architecture 7.1 L7S2 Register Renaming Introduction (1108).mp4 download
141.8M
Computer Architecture 7.2 L7S3 Register Renaming with Pointers to IQ and ROB (2454).mp4 download
67.6M
Computer Architecture 7.3 L7S4 Register Renaming with Values in IQ and ROB (1214).mp4 download
55.9M
Computer Architecture 7.4 L7S5 Memory Disambiguation (949).mp4 download
25.6M
Computer Architecture 8.0 L8S1 Limits of Out-of-Order Design Complexity (1313).mp4 download
42.3M
Computer Architecture 8.1 L8S2 Introduction to VLIW (2157).mp4 download
40.0M
Computer Architecture 8.2 L8S3 VLIW Compiler Optimizations (2120).mp4 download
15.5M
Computer Architecture 8.3 L8S4 Classic VLIW Challenges (818).mp4 download
19.3M
Computer Architecture 8.4 L8S5 Introduction to Predication (951).mp4 download
20.0M
Computer Architecture 9.0 L9S1 Scheduling Model Review (558).mp4 download
73.2M
Computer Architecture 9.1 L9S2 Review of Predication (3048).mp4 download
23.9M
Computer Architecture 9.2 L9S3 Predication Implementation (1006).mp4 download
49.1M
Computer Architecture 9.3 L9S4 Speculation Execution (2602).mp4 download
23.2M
Computer Architecture 9.4 L9S5 Dynamic Events and Clustered VLIWs (1042).mp4 download
49.1M
Computer Architecture 9.5 L9S6 Case Study IA-64Itanium (2110).mp4 download
12.0M
Computer Architecture 10.0 L10S1 Branch Cost Motivation (637).mp4 download
9.4M
Computer Architecture 10.1 L10S2 Branch Prediction Introduction (518).mp4 download
29.3M
Computer Architecture 10.2 L10S3 Static Outcome Prediction (1605).mp4 download
165.2M
Computer Architecture 10.3 L10S4 Dynamic Outcome Prediction (2912).mp4 download
35.7M
Computer Architecture 10.4 L10S5 Target Address Prediction (1845).mp4 download
34.5M
Computer Architecture 11.0 L11S1 Basic Cache Optimizations (1608).mp4 download
28.4M
Computer Architecture 11.1 L11S2 Cache Pipelining (1416).mp4 download
21.5M
Computer Architecture 11.2 L11S3 Write Buffers (952).mp4 download
52.8M
Computer Architecture 11.3 L11S4 Multilevel Caches (1737).mp4 download
58.5M
Computer Architecture 11.4 L11S5 Victim Caches (604).mp4 download
148.9M
Computer Architecture 11.5 L11S6 Prefetching (1234).mp4 download
48.6M
Computer Architecture 12.0 L12S1 Multiporting and Banking (2008).mp4 download
70.9M
Computer Architecture 12.1 L12S2 Software Memory Optimizations (1653).mp4 download
42.1M
Computer Architecture 12.2 L12S3 Non-blocking Caches (1929).mp4 download
7.0M
Computer Architecture 12.3 L12S4 Critical Word First and Early Restart (306).mp4 download
32.1M
Computer Architecture 13.0 L13S1 Memory Management Introduction (1304).mp4 download
26.0M
Computer Architecture 13.1 L13S2 Base and Bound Registers (1144).mp4 download
154.8M
Computer Architecture 13.2 L13S3 Page Based Memory Systems (2704).mp4 download
33.6M
Computer Architecture 13.3 L13S4 Translation and Protection (1437).mp4 download
26.0M
Computer Architecture 13.4 L13S5 TLB Processing (1200).mp4 download
22.7M
Computer Architecture 14.0 L14S1 Address Translation Review (936).mp4 download
54.9M
Computer Architecture 14.1 L14S2 Cache and Memory Protection Interaction (2218).mp4 download
44.6M
Computer Architecture 14.2 L14S3 Vector Processor Introduction (1804).mp4 download
13.8M
Computer Architecture 14.3 L14S4 Vector Parallelism (644).mp4 download
41.8M
Computer Architecture 14.4 L14S5 Vector Hardware Optimizations (1852).mp4 download
11.8M
Computer Architecture 14.5 L14S6 Vector Software and Compiler Optimizations (554).mp4 download
23.5M
Computer Architecture 15.0 L15S1 Reduction ScatterGather and the Cray 1 (920).mp4 download
15.4M
Computer Architecture 15.1 L15S2 SIMD (658).mp4 download
45.2M
Computer Architecture 15.2 L15S3 GPUs (2002).mp4 download
16.2M
Computer Architecture 15.3 L15S4 Multithreading Motivation (733).mp4 download
59.9M
Computer Architecture 15.4 L15S5 Course-Grain Multithreading (2616).mp4 download
30.4M
Computer Architecture 15.5 L15S6 Simultaneous Multithreading (1253).mp4 download
99.3M
Computer Architecture 16.0 L16S1 SMT Implementation (1719).mp4 download
101.6M
Computer Architecture 16.1 L16S2 Introduction to Parallelism (1759).mp4 download
119.0M
Computer Architecture 16.2 L16S3 Sequential Consistency (2100).mp4 download
21.3M
Computer Architecture 16.3 L16S4 Introduction to Locks (0339).mp4 download
8.5M
Computer Architecture 17.0 L17S1 Sequential Consistency Review (348).mp4 download
18.9M
Computer Architecture 17.1 L17S2 Locks and Semaphores (1001).mp4 download
51.3M
Computer Architecture 17.2 L17S3 Atomic Operations (2711).mp4 download
22.7M
Computer Architecture 17.3 L17S4 Memory Fences (1111).mp4 download
28.6M
Computer Architecture 17.4 L17S5 Dekker's Algorithm (1413).mp4 download
11.9M
Computer Architecture 18.0 L18S1 Locking Review (204).mp4 download
69.3M
Computer Architecture 18.1 L18S2 Bus Implementation (1211).mp4 download
97.6M
Computer Architecture 18.2 L18S3 Cache Coherence (1704).mp4 download
30.1M
Computer Architecture 18.3 L18S4 Bus-Based Multiprocessors (516).mp4 download
249.9M
Computer Architecture 18.4 L18S5 Cache Coherence Protocols (4900).mp4 download
119.6M
Computer Architecture 19.0 L19S1 More Cache Coherence Protocols (2116).mp4 download
15.0M
Computer Architecture 19.1 L19S2 Introduction to Interconnection Networks (829).mp4 download
135.6M
Computer Architecture 19.2 L19S3 Message Passing (2659).mp4 download
29.0M
Computer Architecture 19.3 L19S4 Interconnect Design (1506).mp4 download
19.0M
Computer Architecture 20.0 L20S1 Networking Review (756).mp4 download
39.9M
Computer Architecture 20.1 L20S2 Topology (1853).mp4 download
33.8M
Computer Architecture 20.2 L20S3 Topology Parameters (1425).mp4 download
31.7M
Computer Architecture 20.3 L20S4 Network Performance (1535).mp4 download
48.0M
Computer Architecture 20.4 L20S5 Routing and Flow Control (2027).mp4 download
14.2M
Computer Architecture 21.0 L21S1 Credit Based Flow Control (723).mp4 download
18.8M
Computer Architecture 21.1 L21S2 Deadlock (1009).mp4 download
14.9M
Computer Architecture 21.2 L21S3 False Sharing (929).mp4 download
22.5M
Computer Architecture 21.3 L21S4 Introduction to Directory Coherence (1255).mp4 download
57.1M
Computer Architecture 21.4 L21S5 Implementation (2902).mp4 download
62.7M
Computer Architecture 21.5 L21S6 Scalability of Directory Coherence (1331).mp4 download
download 108 files
OGG VIDEO
Uplevel BACK
39.3M
Computer Architecture 0.0 L00-S1Course Introduction.ogv download
19.6M
Computer Architecture 1.0 L1S1 Course Overview (434).ogv download
71.5M
Computer Architecture 1.1 L1S2 Motivation (1640).ogv download
39.3M
Computer Architecture 1.2 L1S3 Course Content (910).ogv download
101.6M
Computer Architecture 1.3 L1S4 Architecture and Microarchitecture (2337).ogv download
69.0M
Computer Architecture 1.4 L1S5 Machine Models (1602).ogv download
110.9M
Computer Architecture 1.5 L1S6 ISA Characteristics (2547).ogv download
5.0M
Computer Architecture 1.6 L1S7 Recap (0117).ogv download
60.7M
Computer Architecture 2.0 L2S1 Microcoded Microarchitecture (1408).ogv download
131.5M
Computer Architecture 2.1 L2S2 Pipeline Basics (3051).ogv download
44.9M
Computer Architecture 2.2 L2S3 Structural Hazard (1013).ogv download
200.3M
Computer Architecture 2.3 L2S4 Data Hazards (4633).ogv download
59.8M
Computer Architecture 3.0 L3S1 Control Hazards Jumps (1556).ogv download
103.2M
Computer Architecture 3.1 L3S2 Control Hazards Branch (2402).ogv download
33.7M
Computer Architecture 3.2 L3S3 Control Hazards Others(751).ogv download
95.8M
Computer Architecture 3.3 L3S4 Memory Technologies (2247).ogv download
95.3M
Computer Architecture 3.4 L3S5 Motivation for Caches (2225).ogv download
119.8M
Computer Architecture 4.0 L4S1 Classifying Caches (2807).ogv download
73.3M
Computer Architecture 4.1 L4S2 Cache Performance (1711).ogv download
28.5M
Computer Architecture 4.2 L4S3 Superscalar 1 (642).ogv download
20.5M
Computer Architecture 4.3 L4S4 Basic Two-way In-order Superscalar (456).ogv download
46.9M
Computer Architecture 4.4 L4S5 Fetch Logic and Alignment (1101).ogv download
18.2M
Computer Architecture 5.0 L5S1 Baseline Superscalar and Alignment (416).ogv download
52.3M
Computer Architecture 5.1 L5S2 Interrupts and Bypassing (1213).ogv download
126.2M
Computer Architecture 5.2 L5S3 Interrupts and Exceptions (2925).ogv download
132.3M
Computer Architecture 5.3 L5S4 Introduction to Out-of-Order Processors (3053).ogv download
14.6M
Computer Architecture 6.0 L6S1 Review of Out-of-Order Processors (326).ogv download
85.6M
Computer Architecture 6.1 L6S2 I2O2 Processors (1958).ogv download
122.6M
Computer Architecture 6.2 L6S3 I2O1 Processors (2844).ogv download
70.1M
Computer Architecture 6.3 L6S4 IO3 Processors (1623).ogv download
19.2M
Computer Architecture 6.4 L6S5 IO2I Processors (431).ogv download
62.8M
Computer Architecture 7.0 L7S1 Speculation and Branch (1437).ogv download
47.3M
Computer Architecture 7.1 L7S2 Register Renaming Introduction (1108).ogv download
106.1M
Computer Architecture 7.2 L7S3 Register Renaming with Pointers to IQ and ROB (2454).ogv download
52.2M
Computer Architecture 7.3 L7S4 Register Renaming with Values in IQ and ROB (1214).ogv download
41.8M
Computer Architecture 7.4 L7S5 Memory Disambiguation (949).ogv download
56.4M
Computer Architecture 8.0 L8S1 Limits of Out-of-Order Design Complexity (1313).ogv download
94.0M
Computer Architecture 8.1 L8S2 Introduction to VLIW (2157).ogv download
91.9M
Computer Architecture 8.2 L8S3 VLIW Compiler Optimizations (2120).ogv download
35.6M
Computer Architecture 8.3 L8S4 Classic VLIW Challenges (818).ogv download
42.3M
Computer Architecture 8.4 L8S5 Introduction to Predication (951).ogv download
25.3M
Computer Architecture 9.0 L9S1 Scheduling Model Review (558).ogv download
132.1M
Computer Architecture 9.1 L9S2 Review of Predication (3048).ogv download
43.2M
Computer Architecture 9.2 L9S3 Predication Implementation (1006).ogv download
111.8M
Computer Architecture 9.3 L9S4 Speculation Execution (2602).ogv download
45.3M
Computer Architecture 9.4 L9S5 Dynamic Events and Clustered VLIWs (1042).ogv download
90.9M
Computer Architecture 9.5 L9S6 Case Study IA-64Itanium (2110).ogv download
27.3M
Computer Architecture 10.0 L10S1 Branch Cost Motivation (637).ogv download
19.8M
Computer Architecture 10.1 L10S2 Branch Prediction Introduction (518).ogv download
63.4M
Computer Architecture 10.2 L10S3 Static Outcome Prediction (1605).ogv download
118.9M
Computer Architecture 10.3 L10S4 Dynamic Outcome Prediction (2912).ogv download
80.1M
Computer Architecture 10.4 L10S5 Target Address Prediction (1845).ogv download
68.8M
Computer Architecture 11.0 L11S1 Basic Cache Optimizations (1608).ogv download
61.2M
Computer Architecture 11.1 L11S2 Cache Pipelining (1416).ogv download
42.3M
Computer Architecture 11.2 L11S3 Write Buffers (952).ogv download
120.9M
Computer Architecture 11.3 L11S4 Multilevel Caches (1737).ogv download
44.3M
Computer Architecture 11.4 L11S5 Victim Caches (604).ogv download
113.1M
Computer Architecture 11.5 L11S6 Prefetching (1234).ogv download
85.8M
Computer Architecture 12.0 L12S1 Multiporting and Banking (2008).ogv download
115.1M
Computer Architecture 12.1 L12S2 Software Memory Optimizations (1653).ogv download
83.7M
Computer Architecture 12.2 L12S3 Non-blocking Caches (1929).ogv download
13.2M
Computer Architecture 12.3 L12S4 Critical Word First and Early Restart (306).ogv download
56.3M
Computer Architecture 13.0 L13S1 Memory Management Introduction (1304).ogv download
50.4M
Computer Architecture 13.1 L13S2 Base and Bound Registers (1144).ogv download
116.0M
Computer Architecture 13.2 L13S3 Page Based Memory Systems (2704).ogv download
62.9M
Computer Architecture 13.3 L13S4 Translation and Protection (1437).ogv download
51.6M
Computer Architecture 13.4 L13S5 TLB Processing (1200).ogv download
41.2M
Computer Architecture 14.0 L14S1 Address Translation Review (936).ogv download
95.7M
Computer Architecture 14.1 L14S2 Cache and Memory Protection Interaction (2218).ogv download
77.4M
Computer Architecture 14.2 L14S3 Vector Processor Introduction (1804).ogv download
28.8M
Computer Architecture 14.3 L14S4 Vector Parallelism (644).ogv download
80.9M
Computer Architecture 14.4 L14S5 Vector Hardware Optimizations (1852).ogv download
25.2M
Computer Architecture 14.5 L14S6 Vector Software and Compiler Optimizations (554).ogv download
40.0M
Computer Architecture 15.0 L15S1 Reduction ScatterGather and the Cray 1 (920).ogv download
29.8M
Computer Architecture 15.1 L15S2 SIMD (658).ogv download
86.3M
Computer Architecture 15.2 L15S3 GPUs (2002).ogv download
32.4M
Computer Architecture 15.3 L15S4 Multithreading Motivation (733).ogv download
113.0M
Computer Architecture 15.4 L15S5 Course-Grain Multithreading (2616).ogv download
55.3M
Computer Architecture 15.5 L15S6 Simultaneous Multithreading (1253).ogv download
74.1M
Computer Architecture 16.0 L16S1 SMT Implementation (1719).ogv download
76.1M
Computer Architecture 16.1 L16S2 Introduction to Parallelism (1759).ogv download
86.8M
Computer Architecture 16.2 L16S3 Sequential Consistency (2100).ogv download
15.6M
Computer Architecture 16.3 L16S4 Introduction to Locks (0339).ogv download
15.7M
Computer Architecture 17.0 L17S1 Sequential Consistency Review (348).ogv download
43.0M
Computer Architecture 17.1 L17S2 Locks and Semaphores (1001).ogv download
117.1M
Computer Architecture 17.2 L17S3 Atomic Operations (2711).ogv download
48.0M
Computer Architecture 17.3 L17S4 Memory Fences (1111).ogv download
61.0M
Computer Architecture 17.4 L17S5 Dekker's Algorithm (1413).ogv download
8.8M
Computer Architecture 18.0 L18S1 Locking Review (204).ogv download
52.2M
Computer Architecture 18.1 L18S2 Bus Implementation (1211).ogv download
72.9M
Computer Architecture 18.2 L18S3 Cache Coherence (1704).ogv download
22.5M
Computer Architecture 18.3 L18S4 Bus-Based Multiprocessors (516).ogv download
210.8M
Computer Architecture 18.4 L18S5 Cache Coherence Protocols (4900).ogv download
91.1M
Computer Architecture 19.0 L19S1 More Cache Coherence Protocols (2116).ogv download
33.1M
Computer Architecture 19.1 L19S2 Introduction to Interconnection Networks (829).ogv download
106.2M
Computer Architecture 19.2 L19S3 Message Passing (2659).ogv download
63.2M
Computer Architecture 19.3 L19S4 Interconnect Design (1506).ogv download
33.9M
Computer Architecture 20.0 L20S1 Networking Review (756).ogv download
81.2M
Computer Architecture 20.1 L20S2 Topology (1853).ogv download
62.0M
Computer Architecture 20.2 L20S3 Topology Parameters (1425).ogv download
67.1M
Computer Architecture 20.3 L20S4 Network Performance (1535).ogv download
87.9M
Computer Architecture 20.4 L20S5 Routing and Flow Control (2027).ogv download
27.4M
Computer Architecture 21.0 L21S1 Credit Based Flow Control (723).ogv download
38.7M
Computer Architecture 21.1 L21S2 Deadlock (1009).ogv download
40.7M
Computer Architecture 21.2 L21S3 False Sharing (929).ogv download
55.5M
Computer Architecture 21.3 L21S4 Introduction to Directory Coherence (1255).ogv download
124.8M
Computer Architecture 21.4 L21S5 Implementation (2902).ogv download
52.9M
Computer Architecture 21.5 L21S6 Scalability of Directory Coherence (1331).ogv download
download 13 files
PDF
Uplevel BACK
download 13 files
SINGLE PAGE PROCESSED JP2 ZIP
Uplevel BACK
download 1 file
TORRENT download
download 518 Files
download 7 Original
SHOW ALL

IN COLLECTIONS

Academic Torrents
The Dataset Collection

Uploaded by arkiver2 on

SIMILAR ITEMS (based on metadata)

Terms of Service (last updated 12/31/2014)